Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED

This letter describes a direct Cu bonding technology to there-dimensionally integrate heterogeneous dielets based on chip-on-wafer configuration. 100- $\mu \text{m}$ -cubed blue $ LEDs temporarily adhered photosensitive resin are interconnected by semi-additive plating (SAP) without thermal compression bonding. By using SAP bonding, lot of can be stacked thin 3D-IC chiplets. The following three key technologies applied solve the yield issues After pick-and-place assembly, additional coplanarity enhancement eliminates bridges grown small gap between and resin. arrays with sidewalls insulated room-temperature ozone-ethylene-radical (OER)-SiO2-CVD successfully bonded sapphire wafers through-Si via (TSV). Further design optimization is required, but partial seed pre-etching works well increase yield. Fully integrated module implementation 3D-ICs will next stage, however, we discuss superior prospect for toward nearly 100%.